1. Field of the Invention
The present invention relates to detection of input signals using data receivers, and particularly to a signal detection circuit and a signal detection method for detecting presence or absence of differential input signals.
2. Description of Related Art
In data receivers of serial buses employing differential input signals, circuits for detecting presence or absence of input of differential input signals might be required. A signal detection method might in such a case be a method in which it is judged that no signal is present when an amplitude value of a differential voltage of a differential input signal is less than a reference voltage value and that a signal is present when this value is not less than the reference voltage value. A conventional signal detection circuit 100, which is a circuit for performing the above operations, is shown in FIG. 10.
The signal detection circuit 100 comprises an amplifier section 101 and a comparator section 102. The comparator 102 is provided with a Gilbert cell circuit 104 and a comparator circuit 105. The Gilbert cell circuit 104 is provided with differential amplifiers 112 and 113 of four input and two output structure. Data plus signals DP, data minus signals DM, high reference voltages RH and low reference voltages RL are respectively differential-amplified through the amplifier section 101 to become amplified data plus signals GDP, amplified data minus signals GDM, amplified high reference voltages GRH and amplified low reference voltages GRL, respectively, whereupon these are input to the differential amplifiers 112 and 113. Here, the data plus signals DP and data minus signals DM are differential input signals. Further, the high reference voltages RH and low reference voltages RL are reference voltages that are respectively set to specified values.
A diagram in which the Gilbert cell circuit 104 is shown as a specific example of a circuit structure is shown in FIG. 11. The Gilbert cell circuit 104 comprises a first Gilbert cell 120, a second Gilbert cell 121, a first amplifier section 122, and a second amplifier section 123. In the first Gilbert cell 120, amplified data plus signals GDP that are input to a gate of a transistor M101 and amplified data minus signals GDM that are input to a gate of a transistor M103 are compared. Further, amplified high reference voltages GRH that are input to a gate of a transistor M102 are compared with amplified low reference voltages GRL that are input to a gate of a transistor M104. Here, since drain terminals of the transistors M101 and M102 and drain terminals of the transistors M103 and M104 are connected in the first Gilbert cell 120, current adding is performed. With this arrangement, a sum of respective results of comparison is obtained. The results of comparison obtained from the current sum in the first Gilbert cell 120 are output as amplified signals NN1, NN2 that have been converted into voltage in the first amplifier section 122. By performing the same operations in the second Gilbert cell 121, amplified signals NN3 and NN4 are output from the second amplifier section 123.
In FIG. 10, the amplified signals NN1 to NN4 are input to the comparator circuit 105. The comparator circuit 105 is provided with comparators 114 and 115. The amplified signals NN1 and NN2 are input to a non-inversed input terminal and an inversed input terminal of the comparator 114 while comparison result signals CPH1 are output from the comparator 114. The amplified signals NN3 and NN4 are input to a non-inversed input terminal and an inversed input terminal of the comparator 115 while comparison result signals CPL1 are output from the comparator 115. The presence or absence of input signals to the data receiver is detected on the basis of the results of the comparison result signals CPH1 and the comparison result signals CPL1.